Name
Abstract | ||
|---|---|---|
Approximate computing is a promising approach for low-power IC design and has recently received considerable research attention. To accommodate dynamic levels of approximation, a few accuracy-configurable adder (ACA) designs have been developed in the past. However, these designs tend to incur large area overheads as they rely on either redundant computing or complicated carry prediction. Some of ... |
Year | DOI | Venue |
|---|---|---|
2018 | 10.1109/TVLSI.2018.2803081 | IEEE Transactions on Very Large Scale Integration (VLSI) Systems |
Keywords | Field | DocType |
Adders,Redundancy,Degradation,Very large scale integration,Discrete cosine transforms,Error correction,Delays | Adder,Computer science,Discrete cosine transform,Error detection and correction,Electronic engineering,Multiplication,Integrated circuit design,Redundancy (engineering),Computer engineering,Very-large-scale integration,Approximate computing | Journal |
Volume | Issue | ISSN |
26 | 6 | 1063-8210 |
Citations | PageRank | References |
5 | 0.48 | 0 |
Authors | ||
3 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Wenbin Xu | 1 | 23 | 7.96 |
| Sachin Sapatnekar | 2 | 4074 | 361.60 |
| Jiang Hu | 3 | 668 | 65.67 |