Name
Abstract | ||
|---|---|---|
As memory densities have drastically increased, memory faults have become the major factor of the decline in the yield. One powerful solution is built-in redundancy analysis (BIRA) which repairs faulty cells with spare lines. However, area overhead of BIRA should be carefully considered because a chip area is limited. In order to maximize the yield and minimize area overhead simultaneously, this paper proposes an efficient built-in self-repair (BISR) scheme. The proposed scheme performs the memory test process twice, so that faulty addresses can be stored efficiently. Experimental results show that the proposed BIRA can obtain optimal repair rate with very small area overhead. |
Year | DOI | Venue |
|---|---|---|
2017 | 10.1109/ISOCC.2017.8368791 | 2017 International SoC Design Conference (ISOCC) |
Keywords | Field | DocType |
built-in self-repair (BISR),built-in redundancy analysis (BIRA),optimal repair rate,area overhead | Spare part,Computer science,% area reduction,Chip,Real-time computing,Memory management,Redundancy (engineering),Built in self repair,Maintenance engineering,Embedded system,Built-in self-test | Conference |
ISSN | ISBN | Citations |
2163-9612 | 978-1-5386-2286-5 | 0 |
PageRank | References | Authors |
0.34 | 3 | 4 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Keewon Cho | 1 | 18 | 4.64 |
| Young-Woo Lee | 2 | 2 | 3.11 |
| Sungyoul Seo | 3 | 10 | 3.27 |
| Sungho Kang | 4 | 12 | 6.64 |