Name
Title | ||
|---|---|---|
The CAESAR-API in the real world — Towards a fair evaluation of hardware CAESAR candidates |
Abstract | ||
|---|---|---|
In 2013 the Competition for Authenticated Encryption: Security, Applicability, and Robustness (CAESAR) was started. It aims at determining a portfolio of ciphers for authenticated encryption that has advantages over AES-GCM in terms of performance, security, and ease of implementation. This competition, for the first time, provides a standardized hardware API, which allows a fair comparison of hardware implementations. However, the community still lacks a common platform to automatically test hardware implementations, confirm implementation claims, and benchmark performance figures on real hardware in terms of runtime, area, power and energy consumption. In this work, we present a common platform using the CAESAR-API in a Xilinx Zynq-7000 System on Chip (SoC) with ARM processors and an AXI interface. This reflects a typical real world usage scenario for hardware-accelerators and thus extends the work for a fair comparison of hardware implementations in three dimensions: first the API is evaluated on a real SoC, which shows, e.g. the performance of the API. Second, it provides a hardware platform to test the proposed implementations of the candidates easily. This can be used by future designers, as we will provide it as open source hardware. Finally, we ran all published hardware implementations of the current 3rd-round candidates during which we identified several implementation weaknesses, e.g. presumably unintended latches in the design, hence emphasizing the importance of testing hardware proposals on real hardware. |
Year | DOI | Venue |
|---|---|---|
2018 | 10.1109/HST.2018.8383893 | 2018 IEEE International Symposium on Hardware Oriented Security and Trust (HOST) |
Keywords | Field | DocType |
CAESAR-API,hardware-accelerators,hardware platform,open source hardware,published hardware implementations,fair evaluation,hardware CAESAR candidates,authenticated encryption,standardized hardware API,benchmark performance figures,energy consumption,automatic test hardware implementations,Xilinx Zynq-7000,system on chip,ARM processors | ARM architecture,System on a chip,Computer science,Field-programmable gate array,Encryption,Robustness (computer science),Implementation,Computer hardware,Authenticated encryption,Open source hardware | Conference |
ISBN | Citations | PageRank |
978-1-5386-4732-5 | 1 | 0.48 |
References | Authors | |
4 | 4 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Michael Tempelmeier | 1 | 4 | 2.26 |
| Fabrizio De Santis | 2 | 84 | 10.44 |
| Georg Sigl | 3 | 447 | 62.13 |
| Jens-Peter Kaps | 4 | 430 | 37.83 |