Title
Intel MPX Explained: A Cross-layer Analysis of the Intel MPX System Stack.
Abstract
Memory-safety violations are the primary cause of security and reliability issues in software systems written in unsafe languages. Given the limited adoption of decades-long research in softwarebased memory safety approaches, as an alternative, Intel released Memory Protection Extensions (MPX)Ða hardware-assisted technique to achieve memory safety. In this work, we perform an exhaustive study of Intel MPX architecture along three dimensions: (a) performance overheads, (b) security guarantees, and (c) usability issues. We present the first detailed root cause analysis of problems in the Intel MPX architecture through a cross-layer dissection of the entire system stack, involving the hardware, operating system, compilers, and applications. To put our findings into perspective,we also present an in-depth comparison of Intel MPX with three prominent types of software-based memory safety approaches. Lastly, based on our investigation, we propose directions for potential changes to the Intel MPX architecture to aid the design space exploration of future hardware extensions for memory safety. A complete version of this work appears in the 2018 proceedings of the ACM on Measurement and Analysis of Computing Systems.
Year
DOI
Venue
2018
10.1145/3308809.3308865
SIGMETRICS (Abstracts)
Keywords
DocType
Volume
intel mpx, isa extensions, memory safety
Journal
2
Issue
ISSN
ISBN
2
0163-5999
978-1-4503-5846-0
Citations 
PageRank 
References 
2
0.36
25
Authors
5
Name
Order
Citations
PageRank
Oleksii Oleksenko1413.50
Dmitrii Kuvaiskii2586.42
Pramod Bhatotia341428.94
Pascal Felber42432178.76
Christof Fetzer52429172.89