Name
Abstract | ||
|---|---|---|
Approximate computing is an emerging approach for designing high performance and low power arithmetic circuits. The logarithmic multiplier (LM) converts multiplication into addition and has inherent approximate characteristics. A method combining the Mitchell's approximation and a dynamic range operand truncation scheme is proposed in this paper to design non-iterative and iterative approximate LMs. The accuracy and the circuit requirements of these designs are assessed to select the best approximate scheme according to different metrics. Compared with conventional non-iterative and iterative 16-bit LMs with exact operands, the normalized mean error distance (NMED) of the best proposed approximate non-iterative and iterative LMs is decreased up to 24.1% and 18.5%, respectively, while the power-delay product (PDP) is decreased up to 51.7% and 45.3%, respectively. Case studies for two error-tolerant applications show the validity of the proposed approximate LMs.
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Year | DOI | Venue |
|---|---|---|
2018 | 10.1145/3194554.3194628 | ACM Great Lakes Symposium on VLSI |
Keywords | Field | DocType |
Approximate computing, logarithmic multiplier, operand truncation, low power | Truncation,Normalization (statistics),Dynamic range,Computer science,Operand,Algorithm,Mean squared error,Electronic engineering,Multiplier (economics),Multiplication,Logarithm | Conference |
ISSN | ISBN | Citations |
1066-1395 | 978-1-4503-5724-1 | 1 |
PageRank | References | Authors |
0.37 | 9 | 4 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Peipei Yin | 1 | 10 | 2.70 |
| Chenghua Wang | 2 | 6 | 4.54 |
| weiqiang liu | 3 | 135 | 28.76 |
| Fabrizio Lombardi | 4 | 57 | 10.81 |