Paper Info
Title
An efficient timestamp-based monitoring approach to test timing constraints of cyber-physical systems.
Abstract
Formal specifications on temporal behavior of Cyber-Physical Systems (CPS) is essential for verification of performance and safety. Existing solutions for verifying the satisfaction of temporal constraints on a CPS are compute and resource intensive since they require buffering signals from the CPS prior to constraint checking. We present an online approach, based on Timestamp Temporal Logic (TTL), for monitoring the timing constraints in CPS. The approach reduces the computation and memory requirements by processing the timestamps of pertinent events reducing the need to capture the full data set from the signal sampling. The signal buffer size bears a geometric relationship to the dimension of the signal vector, the time interval being considered, and the sampling resolution. Since monitoring logic is typically implemented on Field Programmable Gate Arrays (FPGAs) for efficient monitoring of multiple signals simultaneously, the space required to store the buffered data becomes the limiting resource. The monitoring logic, for the timing constraints on the Flying Paster (a printing application requiring synchronization between two motors), is illustrated in this paper to demonstrate a geometric reduction in memory and computational resources in the realization of an online monitor.
Year
Venue
Field
2018
DAC
Synchronization,Hardware security module,Computer science,Field-programmable gate array,Formal specification,Real-time computing,Cyber-physical system,Memory management,Timestamp,Temporal logic
DocType
Citations 
PageRank 
Conference
0
0.34
References 
Authors
11
11
Name
Order
Citations
PageRank
Mohammadreza Mehrabian182.91
Mohammad Khayatian2144.22
Ahmed Mousa300.68
Aviral Shrivastava481268.67
Ya-Shian Li-Baboud5163.37
Patricia Derler6828.45
Edward Griffor773.51
Hugo A. Andrade8244.79
Marc Weiss9122.80
John C. Eidson10122.13
Dhananjay M. Anand11104.81