Name
Title | ||
|---|---|---|
An Exploration of Applying Gate-Length-Biasing Techniques to Deeply-Scaled FinFETs Operating in Multiple Voltage Regimes. |
Abstract | ||
|---|---|---|
With the aggressive downscaling of process technologies and the importance of batterypowered systems, reducing leakage power consumption has become a crucial design challenge for IC designers. In addition, the traditional bulk CMOS technologies face significant challenges related to short-channel effects and process variations. FinFET devices have attracted a lot of attention as an alternative to ... |
Year | DOI | Venue |
|---|---|---|
2018 | 10.1109/TETC.2016.2640185 | IEEE Transactions on Emerging Topics in Computing |
Keywords | Field | DocType |
FinFETs,Logic gates,CMOS technology,Power demand,Libraries,Standards | Logic gate,Computer science,Voltage,Leakage power,Real-time computing,CMOS,Power demand,Biasing | Journal |
Volume | Issue | ISSN |
6 | 2 | 2168-6750 |
Citations | PageRank | References |
0 | 0.34 | 0 |
Authors | ||
5 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Tiansong Cui | 1 | 61 | 8.49 |
| Ji Li | 2 | 97 | 10.87 |
| Yanzhi Wang | 3 | 1082 | 136.11 |
| Shahin Nazarian | 4 | 327 | 38.55 |
| Massoud Pedram | 5 | 7801 | 1211.32 |