Name
Title | ||
|---|---|---|
Hardware implementation-oriented fast intra-coding based on downsampling information for HEVC. |
Abstract | ||
|---|---|---|
This paper proposes a downsampling information-based intra-coding scheme which consists of two parts, preprocessing stage and fast intra-coding stage. Three downsampling information-based fast decision algorithms are proposed in fast intra-coding stage. Moreover, a parallelized architecture for the proposed fast intra-coding scheme is proposed. The preprocessed downsampling stage can be executed with intra-coding stage in parallel. The proposed architecture fully makes use of this feature to improve the throughput and fragment data dependency. Experimental results demonstrate that the proposed algorithms achieves on average 60.4% reduction in encoding time with negligible coding efficiency loss, compared with original HEVC. |
Year | DOI | Venue |
|---|---|---|
2018 | 10.1007/s11554-017-0677-4 | J. Real-Time Image Processing |
Keywords | Field | DocType |
HEVC, Intra-coding, Fast algorithms, High-resolution applications | Computer vision,Data dependency,Algorithmic efficiency,Computer science,Coding (social sciences),Real-time computing,Preprocessor,Artificial intelligence,Throughput,Upsampling,Encoding (memory) | Journal |
Volume | Issue | ISSN |
15 | 1 | 1861-8219 |
Citations | PageRank | References |
1 | 0.36 | 18 |
Authors | ||
5 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Wen Shi | 1 | 16 | 4.24 |
| Tian Song | 2 | 44 | 5.48 |
| Takafumi Katayama | 3 | 19 | 5.70 |
| Xiantao Jiang | 4 | 50 | 8.24 |
| Takashi Shimamoto | 5 | 51 | 9.88 |