Title
A low power potentiostat for implantable glucose sensor tag
Abstract
This paper presents a low power current-mirror based potentiostat for implantable glucose sensor tags. With a potential-control loop and an error-reduction loop, the potentiostat can accurately capture the weak current from glucose sensors. The design has been implemented using SMIC 0.13 μm 1P8M CMOS process. According to the test results, the liner correlation coefficient of the potentiostat is 0.999936 with the current range of 0~40nA, and the power consumption of the potentiostat is 3.6 μW.
Year
DOI
Venue
2015
10.1109/ASICON.2015.7516926
2015 IEEE 11th International Conference on ASIC (ASICON)
Keywords
Field
DocType
power consumption,liner correlation coefficient,CMOS process,error-reduction loop,potential-control loop,implantable glucose sensor tag,low power potentiostat
Correlation coefficient,Glucose sensors,Computer science,Cmos process,Electronic engineering,Potentiostat,Electrical engineering,Power consumption
Conference
ISSN
ISBN
Citations 
2162-7541
978-1-4799-8486-2
0
PageRank 
References 
Authors
0.34
0
5
Name
Order
Citations
PageRank
Xi Tan17314.27
Sizheng Chen2133.39
Zhibin Xiao3110.96
Feng Chen400.68
Junyu Wang5256.88