Paper Info
Title
A 20mhz Bw 35fj/Conv. Continuous-Time Sigma Delta Modulator With Single-Opamp Resonator Using Finite Gbw Compensation Method
Abstract
This paper presents a 3rd-order continuous time sigma-delta (Sigma Delta) modulator (CTSDM) using several low power techniques. A compact architecture of 3rd-order CTSDM is proposed to reduce power dissipation on system level. The loop-filter which is the key block of this CTSDM architecture consists of feedforward p'ath, feedforward amplifier, single-opamp resonator and passive adder. A finite gain bandwidth (GBW) compensation method is used to improve the performance. This modulator is designed with TSMC 65nm CMOS process and archives 80dB SNR in 20MHz signal bandwidth while the FOM is 35fJ/conv.
Year
DOI
Venue
2015
10.1109/ASICON.2015.7517106
PROCEEDINGS OF 2015 IEEE 11TH INTERNATIONAL CONFERENCE ON ASIC (ASICON)
Field
DocType
ISSN
Adder,Computer science,Dissipation,Resonator,Electronic engineering,Modulation,Bandwidth (signal processing),Operational amplifier,Amplifier,Feed forward
Conference
2162-7541
Citations 
PageRank 
References 
0
0.34
0
Authors
5
Name
Order
Citations
PageRank
Zemin Feng122.20
Jingjing Wang221.09
Chixiao Chen343.11
Jun Xu401.69
Junyan Ren5413.32