Name
Title | ||
|---|---|---|
An Area-Efficient Column-Parallel Digital Decimation Filter With Pre-BWI Topology for CMOS Image Sensor. |
Abstract | ||
|---|---|---|
This paper presents an area-efficient design of a column-parallel second-order digital decimation filter for a ΣΔ analog-to-digital converter-based CMOS image sensor. By using the proposed pre-bitwise-inversion topology having the same mathematical function, the chip area could be curtailed, where the bit-wise-inversion block, required by the correlated-double-sampling, is moved to the front of th... |
Year | DOI | Venue |
|---|---|---|
2018 | 10.1109/TCSI.2018.2795086 | IEEE Transactions on Circuits and Systems I: Regular Papers |
Keywords | Field | DocType |
Adders,CMOS image sensors,Transistors,Analog-digital conversion,Dynamic range,Topology | Transistor count,Topology,Decimation,Adder,Integrator,Chip,Electronic engineering,Multiplexer,Ripple,Clock rate,Mathematics | Journal |
Volume | Issue | ISSN |
65 | 8 | 1549-8328 |
Citations | PageRank | References |
1 | 0.36 | 0 |
Authors | ||
8 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Fang Tang | 1 | 11 | 1.58 |
| Zhong-Jie Wang | 2 | 356 | 64.60 |
| Yingjun Xia | 3 | 1 | 0.36 |
| Fan Liu | 4 | 11 | 3.92 |
| Xi-chuan Zhou | 5 | 40 | 15.18 |
| Shengdong Hu | 6 | 8 | 3.18 |
| Zhi Lin | 7 | 1 | 1.37 |
| Amine Bermak | 8 | 493 | 90.25 |