Name
Abstract | ||
|---|---|---|
This paper presents the latest version of the pipeline ADC simulator tool (SCALES), a high speed analog behavior simulation tool for analog-to-digital converters. This tool allows topology selection and the digital calibration of the main frontend blocks. Additionally, the tool generates also the required Verilog code to implement the digital calibration block. Several block non-linearities are included in the simulation, such as gain and offset errors, capacitor mismatch, thermal noise, parasitic capacitances, settling errors and other important error sources. The tool has been used and validate in several high performance pipeline ADCs, up to 16 bits resolution. |
Year | DOI | Venue |
|---|---|---|
2016 | 10.1109/SMACD.2016.7520751 | 2016 13th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD) |
Keywords | Field | DocType |
Pipeline ADC,Data Converter,Calibration,Analog-to-Digital,Simulator | Flight dynamics (spacecraft),Pipeline transport,Capacitor,Computer science,Simulation,Noise (electronics),Converters,Electronic engineering,Verilog,Offset (computer science),Calibration | Conference |
ISSN | ISBN | Citations |
2575-4874 | 978-1-5090-0491-1 | 0 |
PageRank | References | Authors |
0.34 | 0 | 3 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Carlos Gomes da Silva | 1 | 153 | 10.25 |
| Jorge Guilherme | 2 | 14 | 6.02 |
| Nuno Cavaco Horta | 3 | 310 | 49.65 |