Name
Abstract | ||
|---|---|---|
This paper presents a novel 64-channel ultra-low power/low noise neural recording System-on-Chip (SoC) featuring a highly reconfigurable Analogue Front-End (AFE) and block-selectable data-driven output. This allows a tunable bandwidth/ sampling rate for extracting Local Field Potentials (LFPs) and/or Extracellular Action Potentials (EAPs). Realtime spike detection utilises a dual polarity simple threshold to enable an event driven output for neural spikes (16-sample window). The 64-channels are organised into 16 sets of 4-channel recording blocks, with each block having a dedicated 10-bit SAR ADC that is time division multiplexed among the 4 channels. Each channel can be individually powered down and configured for bandwidth, gain and detection threshold. The output can thus combine continuous-streaming and event-driven data packets with the system configured as SPI slave. The SoC is implemented in a commercially-available 0.35 mu m CMOS technology occupying a silicon area of 19.1mm(2) (0.3mm(2) gross per channel) and requiring 32 mu W/channel power consumption (AFE only). |
Year | Venue | Field |
|---|---|---|
2016 | PROCEEDINGS OF 2016 IEEE BIOMEDICAL CIRCUITS AND SYSTEMS CONFERENCE (BIOCAS) | Computer science,Network packet,Sampling (signal processing),Communication channel,Electronic engineering,CMOS,Bandwidth (signal processing),Local field potential,Successive approximation ADC,Multiplexing |
DocType | ISSN | Citations |
Conference | 2163-4025 | 0 |
PageRank | References | Authors |
0.34 | 0 | 4 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Song Luan | 1 | 11 | 4.85 |
| Yan Liu | 2 | 30 | 11.70 |
| i n williams | 3 | 5 | 2.20 |
| Timothy G. Constandinou | 4 | 78 | 38.42 |