Title
Investigation of phase noise and jitter in CMOS sampling clock generation circuits for time-domain breast cancer detection system
Abstract
Impulse radio ultrawideband (IR-UWB) technologies have been applied for time-domain breast cancer imaging systems. A Gaussian monocycle pulse (GMP) train with 200 ps pulse width is generated and the received GMP is converted from analog to digital by an equivalent time sampling circuit. A fluctuation of the sampling timing such as a jitter causes a degradation of reconstructed images. In this paper, the influence of jitter on confocal imaging is investigated. It is found that the SNR is improved by reducing the jitter. A low-jitter 102.4GS/s sampling clock generator in 65nm CMOS technology is proposed. This circuit achieved 1.98 ps jitter by 1.2V voltage supply and 0.90ps jitter by 1.45V voltage supply.
Year
DOI
Venue
2017
10.1109/BIOCAS.2017.8325067
2017 IEEE Biomedical Circuits and Systems Conference (BioCAS)
Keywords
Field
DocType
IR-UWB,Equivalent time sampling circuit,Jitter,Clock generation system
Time domain,Clock generator,Computer science,Signal-to-noise ratio,Pulse-width modulation,Phase noise,Electronic engineering,CMOS,Jitter,Electronic circuit
Conference
ISBN
Citations 
PageRank 
978-1-5090-5804-4
0
0.34
References 
Authors
0
8