Name
Abstract | ||
|---|---|---|
Hardware Transaction Memory (HTM) opens a new way to scaling multi-core software. Its main target is to achieve high performance on multi-core systems, and at the same time simplify concurrency control and guarantee correctness. This paper presents the redesign of an existing concurrent hash table using several HTM-based synchronization mechanisms. As compared with a fine-grained lock implementation, HTM-based locking scales well on our testing platform, and its performance is higher when running large-scale workloads. In addition, HTM-based global locking consumes much less memory. In summary, several observations are made in this paper with detailed experimental analysis, which would have important implications for future research of concurrent data structures and HTM. |
Year | DOI | Venue |
|---|---|---|
2018 | 10.1007/s10766-017-0529-7 | International Journal of Parallel Programming |
Keywords | Field | DocType |
Hardware transactional memory, Concurrent hash table, Synchronization | Synchronization,Concurrency control,Computer science,Lock (computer science),Correctness,Transactional memory,Software,Concurrent data structure,Computer hardware,Hash table | Journal |
Volume | Issue | ISSN |
46 | 4 | 0885-7458 |
Citations | PageRank | References |
0 | 0.34 | 8 |
Authors | ||
4 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| zhiwen chen | 1 | 10 | 2.61 |
| Xin He | 2 | 80 | 28.00 |
| Jianhua Sun | 3 | 192 | 25.27 |
| Hao Chen | 4 | 211 | 37.88 |