Abstract | ||
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Low operating voltage, high storage density, non-volatile storage capabilities, and relative low access latencies have popularized memristive devices as storage devices. Memristors can be ideally used for in-memory computing in the form of hybrid CMOS nano-crossbar arrays. In-memory serial adders have been theoretically and experimentally proven for crossbar arrays. To harness the parallelism of memristive arrays, parallel-prefix adders can be effective. In this work, a novel mapping scheme for in-memory Kogge-Stone adder has been presented. The number of cycles increases logarithmically with the bit width N of the operands, i.e., O(log2N), and the device count is 5N. We verify the correctness of the proposed scheme by means of TaO× device model-based memristive simulations. We compare the proposed scheme with other proposed schemes in terms of number of cycle and number of devices.
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Year | DOI | Venue |
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2018 | 10.1145/3183352 | JETC |
Keywords | DocType | Volume |
ReRAM, adder, in-memory computing, kogge stone adder, memristors | Journal | 14 |
Issue | ISSN | Citations |
2 | 1550-4832 | 0 |
PageRank | References | Authors |
0.34 | 11 | 5 |
Name | Order | Citations | PageRank |
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Debjyoti Bhattacharjee | 1 | 26 | 9.84 |
Anne Siemon | 2 | 67 | 6.78 |
Eike Linn | 3 | 94 | 9.03 |
Stephan Menzel | 4 | 57 | 8.18 |
Anupam Chattopadhyay | 5 | 6 | 4.23 |