Name
Title | ||
|---|---|---|
A 0.5-1.1V 10B Adaptive Bypassing SAR ADC Utilizing Oscillation Cycle Information of VCO-Based Comparator |
Abstract | ||
|---|---|---|
VCO-based comparators generate both bit decisions as well as oscillation cycle information, whereas the latter has not been exploited in SAR ADCs. This work presents a SAR ADC using oscillation cycle as the thresholds for multiple bypass windows, which improves energy efficiency. PVT-induced variations are compensated by adaptive windowing. The implemented 40nm ADC is robust under wide supply voltages ranging 0.5-1.1V with 9.71b peak ENOB at 1.1V and 2.4fJ/c.-s. lowest FoM at 0.5V without any tuning. |
Year | DOI | Venue |
|---|---|---|
2018 | 10.1109/VLSIC.2018.8502440 | 2018 IEEE Symposium on VLSI Circuits |
Keywords | Field | DocType |
VCO-based comparator,multiple bypass windows,40nm ADC,bit decisions,oscillation cycle information,0.5-1.1V 10b adaptive bypassing SAR ADC,PVT-induced variations,energy efficiency,voltage 0.5 V to 1.1 V | Flight dynamics (spacecraft),Oscillation,Capacitor,Comparator,Computer science,Effective number of bits,Electronic engineering,Voltage-controlled oscillator,Ranging,Successive approximation ADC | Conference |
ISSN | ISBN | Citations |
2158-5601 | 978-1-5386-4215-3 | 0 |
PageRank | References | Authors |
0.34 | 0 | 3 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Zhaoming Ding | 1 | 7 | 2.80 |
| Xiong Zhou | 2 | 3 | 2.04 |
| Qiang Li | 3 | 81 | 21.66 |