Name
Title | ||
|---|---|---|
A Cortex-M3 Based MCV Featuring AVS with 34nW Static Power, 15.3pJ/inst. Active Energy, and 16% Power Variation Across Process and Temperature. |
Abstract | ||
|---|---|---|
Power and energy efficiency poses a prime constraint on IoT SoCs. Dynamic voltage and frequency scaling (DVFS) - in combination with adaptive voltage scaling (AVS) - can trade performance for power matching the workload. However, classic timing closure leads to substantial power variations across process and temperature, especially from SS/Cold to FF/Hot due to leakage. This paper presents an ARM Cortex-M3 based MCU with integrated voltage regulator featuring AVS, which achieves for the CPU incl. 8kB SRAM 34nW static power, 15.3pJ/instruction active energy and 16% power variations across process and temperature (-40-120 degrees C) corners measured in silicon. The digital subsystem employs a new replica scheme combining replica circuits and in-situ monitors to track critical paths under the inter/infra-die variations Mandating AVS, we show a novel methodology for logic synthesis with optimal usage percentage per V-th level, at which point the power consumption is balanced and minimized across process and temperature. |
Year | Venue | Keywords |
|---|---|---|
2018 | Proceedings of the European Solid-State Circuits Conference | DVFS,AVS,multi-Vt design,leakage recovery,replica paths,in-situ monitor,integrated voltage regulator |
Field | DocType | ISSN |
Logic synthesis,Central processing unit,Computer science,Efficient energy use,Voltage,Static random-access memory,Electronic engineering,Frequency scaling,Voltage regulator,Timing closure | Conference | 1930-8833 |
Citations | PageRank | References |
0 | 0.34 | 0 |
Authors | ||
4 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Rubén Salvador | 1 | 0 | 0.34 |
| Alberto Sanchez | 2 | 0 | 0.34 |
| Xin Fan | 3 | 776 | 104.55 |
| Tobias Gemmeke | 4 | 49 | 6.49 |