Abstract | ||
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A CMOS burst image sensor reaching 5Mfps with 52 frames in-pixel digital memory has been designed and tested. It fully takes advantage of 3D stacked technology to implement a scalable architecture for 8-bits quantization and data storage at pixel level in CMOS technology. This imager also benefits from backside illumination (BSI) for improved fill factor and wide spectrum sensitivity. A demonstrator has been fabricated, embedding two types of 3D based pixel. In this paper we present the very first experimental test results of 3D stacked in-pixel digital burst image sensor. These results show advantages of using 3D technology to obtain a very high frame rate with both relaxed design conditions and readout timing constraint compared to conventional high speed burst image sensors. |
Year | DOI | Venue |
---|---|---|
2018 | 10.1109/ESSCIRC.2018.8494287 | ESSCIRC 2018 - IEEE 44th European Solid State Circuits Conference (ESSCIRC) |
Keywords | Field | DocType |
burst imaging,digital storage,3D stack,CMOS | Image sensor,Computer science,Computer data storage,Electronic engineering,CMOS,Frame rate,Pixel,Back-illuminated sensor,Quantization (signal processing),Photodiode | Conference |
ISSN | ISBN | Citations |
1930-8833 | 978-1-5386-5405-7 | 0 |
PageRank | References | Authors |
0.34 | 0 | 7 |
Name | Order | Citations | PageRank |
---|---|---|---|
Laurent Millet | 1 | 2 | 1.75 |
Margaux Vigier | 2 | 0 | 0.34 |
Gilles Sicard | 3 | 20 | 10.27 |
Wilfried Uhring | 4 | 4 | 5.19 |
Nils Margotat | 5 | 0 | 0.34 |
Fabrice Guellec | 6 | 2 | 2.09 |
Sébastien Martin | 7 | 21 | 8.16 |