Title
Characterization and Model Validation of Mismatch in Nanometer CMOS at Cryogenic Temperatures
Abstract
The design of cryogenic interface electronics enabling future scalable quantum computers requires the accurate characterization and modeling of nanometer CMOS processes at cryogenic temperatures. To this end, this paper presents the mismatch characterization of 40-nm bulk CMOS transistors over the temperature range from 300 K down to 4.2 K. Measured data confirm that variability increases at cryogenic temperatures, and analysis of such data proves the validity of both the Pelgrom and the Croon models, which describe the mismatch dependency on device area and bias conditions, respectively.
Year
DOI
Venue
2018
10.1109/ESSDERC.2018.8486859
2018 48th European Solid-State Device Research Conference (ESSDERC)
Keywords
Field
DocType
mismatch characterization,cryogenic temperatures,Croon models,cryogenic interface electronics,nanometer CMOS processes,CMOS transistors,quantum computers,temperature 300.0 K,temperature 4.2 K
Nanometer cmos,Atmospheric temperature range,Semiconductor device modeling,Quantum computer,Cryogenics,Electronic engineering,CMOS,Electronics,Transistor,Optoelectronics,Materials science
Conference
ISSN
ISBN
Citations 
1930-8876
978-1-5386-5402-6
4
PageRank 
References 
Authors
0.65
3
6
Name
Order
Citations
PageRank
P. A. 't Hart140.65
jeroen van dijk2437.00
Masoud Babaie319525.05
Edoardo Charbon438574.69
A. Vladimircscu540.65
Fabio Sebastiano615829.99