Name
Abstract | ||
|---|---|---|
CMOS utilizing alternative channel materials such as Ge and III-Vs on Si substrates is strongly expected for high performance and low power logic devices using nano-sheet/nano-wire structures in the future technology nodes. Also, tunneling-FETs (TFETs) using Ge/III-V materials are regarded as one of the most important steep slope devices for the ultra-low power applications. In this paper, we address the current status and key issues of CMOS and TFETs using alternative channel materials such as Ge, III-V and oxide semiconductors. Viable device and process technologies for realizing these devices are presented and discussed on a basis of our recent research activities. |
Year | DOI | Venue |
|---|---|---|
2018 | 10.1109/ESSDERC.2018.8486876 | 2018 48th European Solid-State Device Research Conference (ESSDERC) |
Keywords | Field | DocType |
MOSFET,Tunneling FET,Germanium,III-V semiconductors,oxide semiconductors,Metal-Oxide-Semiconductor,Mobility,Interface states | Engineering physics,Oxide,Communication channel,Electronic engineering,CMOS,Materials science,Silicon-germanium,Silicon,Semiconductor | Conference |
ISSN | ISBN | Citations |
1930-8876 | 978-1-5386-5402-6 | 0 |
PageRank | References | Authors |
0.34 | 1 | 8 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Shinichi Takagi | 1 | 3 | 9.69 |
| Kimihiko Kato Wu-Kang Kim | 2 | 0 | 0.34 |
| Kwangwon Jo | 3 | 0 | 0.34 |
| Ryo Matsumura | 4 | 0 | 0.34 |
| Ryotaro Takaguchi | 5 | 0 | 0.34 |
| Dae-Hwan Ahn | 6 | 0 | 0.34 |
| Takahiro Gotow | 7 | 0 | 0.34 |
| Mitsuru Takenaka | 8 | 4 | 6.86 |