Name
Abstract | ||
|---|---|---|
A new SX-Aurora TSUBASA vector supercomputer has been released, and it features a new system architecture and a new execution model to achieve high sustained performance, especially for memory-intensive applications. In SX-Aurora TSUBASA, the vector host (VH) of a standard x86 Linux node is attached to the vector engine (VE) of the newly developed vector processor. An application is executed on the VE, and only system calls are offloaded to the VH. This new execution model can avoid redundant data transfers between the VH and VE that can easily become a bottleneck in the conventional execution model. This paper examines the potential of SX-Aurora TSUBASA. First, the basic performance is clarified by evaluating benchmark programs. Then, the effectiveness of the new execution model is examined by using a microbenchmark. Finally, the potential of SX-Aurora TSUBASA is clarified through evaluations of practical applications. |
Year | DOI | Venue |
|---|---|---|
2018 | 10.5555/3291656.3291728 | SC |
Keywords | Field | DocType |
Program processors,Bandwidth,Systems architecture,Benchmark testing,Computational modeling,Vector processors,Registers | x86,Bottleneck,Supercomputer,Computer science,Parallel computing,Execution model,Systems architecture,Vector processor,Systems management,Benchmark (computing) | Conference |
Citations | PageRank | References |
8 | 1.10 | 7 |
Authors | ||
9 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Kazuhiko Komatsu | 1 | 76 | 16.72 |
| Shintaro Momose | 2 | 17 | 3.51 |
| Yoko Isobe | 3 | 19 | 4.15 |
| Osamu Watanabe | 4 | 960 | 104.55 |
| Akihiro Musa | 5 | 35 | 8.08 |
| Mitsuo Yokokawa | 6 | 227 | 51.71 |
| Toshikazu Aoyama | 7 | 8 | 1.10 |
| Masayuki Sato | 8 | 12 | 9.40 |
| Hiroaki Kobayashi | 9 | 98 | 16.62 |