Name
Title | ||
|---|---|---|
Preemption of the Partial Reconfiguration Process to Enable Real-Time Computing With FPGAs. |
Abstract | ||
|---|---|---|
To improve computing performance in real-time applications, modern embedded platforms comprise hardware accelerators that speed up the task’s most compute-intensive parts. A recent trend in the design of real-time embedded systems is to integrate field-programmable gate arrays (FPGA) that are reconfigured with different accelerators at runtime, to cope with dynamic workloads that are subject to timing constraints. One of the major limitations when dealing with partial FPGA reconfiguration in real-time systems is that the reconfiguration port can only perform one reconfiguration at a time: if a high-priority task issues a reconfiguration request while the reconfiguration port is already occupied by a lower-priority task, the high-priority task has to wait until the current reconfiguration is completed (a phenomenon known as priority inversion), unless the current reconfiguration is aborted (introducing unbounded delays in low-priority tasks, a phenomenon known as starvation). This article shows how priority inversion and starvation can be solved by making the reconfiguration process preemptive—that is, allowing it to be interrupted at any time and resumed at a later time without restarting it from scratch. Such a feature is crucial for the design of runtime reconfigurable real-time systems but not yet available in today’s platforms. Furthermore, the trade-off of achieving a guaranteed bound on the reconfiguration delay for low-priority tasks and the maximum delay induced for high-priority tasks when preempting an ongoing reconfiguration has been identified and analyzed. Experimental results on the Xilinx Zynq-7000 platform show that the proposed implementation of preemptive reconfiguration introduces a low runtime overhead, thus effectively solving priority inversion and starvation.
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Year | DOI | Venue |
|---|---|---|
2018 | 10.1145/3182183 | TRETS |
Keywords | Field | DocType |
Field programmable gate array (FPGA), dynamic partial reconfiguration, preemptive reconfiguration, real-time reconfiguration | Preemption,Computer science,Field-programmable gate array,Real-time computing,Priority inversion,Control reconfiguration,Speedup | Journal |
Volume | Issue | ISSN |
11 | 2 | 1936-7406 |
Citations | PageRank | References |
0 | 0.34 | 7 |
Authors | ||
5 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Enrico Rossi | 1 | 21 | 2.27 |
| Marvin Damschen | 2 | 15 | 4.66 |
| Lars Bauer | 3 | 358 | 27.36 |
| Giorgio C. Buttazzo | 4 | 3633 | 238.00 |
| Jörg Henkel | 5 | 13 | 8.46 |