Title
Fault Characterization Through FPGA Undervolting
Abstract
The power and energy efficiency of Field Programmable Gate Arrays (FPGAs) are estimated to be up to 20X less than Application Specific Integrated Circuits (ASICs). What is needed to close this gap is aggressive power/energy savings techniques. Such a potentially effective approach is undervolting, which can directly deliver an order of magnitude static and dynamic power savings. However, aggressive undervolting, without accompanying frequency scaling leads to timing related faults, potentially undermining the power savings. Understanding the behavior of these faults and efficiently mitigating them can deliver further power and energy savings in low-voltage designs. In this paper, we conduct a detailed analysis of undervolting FPGA on-chip memories (BRAMs). Through experimental analysis, we find that lowering the supply voltage until a certain conservative level, V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">min</sub> does not introduce any observable fault. For the studied platforms, we measure this voltage guardband gap to be 39% of the nominal level (V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">nom</sub> = 1V, V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">min</sub> = 0.61V). Further undervolting corrupts some of the data bits stored in BRAMs; however, it also reduces the BRAMs power consumption a further 36.1%. When the voltage is lowered below V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">min</sub> , the rate of these faults exponentially increases to 0.06%, by a fully non-uniform distribution over various BRAMs. This paper comprehensively analyzes the behavior of these faults, in terms of rate, type, location, and environmental temperature.
Year
DOI
Venue
2018
10.1109/FPL.2018.00023
2018 28th International Conference on Field Programmable Logic and Applications (FPL)
Keywords
Field
DocType
FPGA,BRAM,Supply Voltage Scaling,Faults,Power Consumption
Computer science,Efficient energy use,Voltage,Field-programmable gate array,Application-specific integrated circuit,Real-time computing,Dynamic demand,Frequency scaling,Nominal level,Order of magnitude,Reliability engineering
Conference
ISSN
ISBN
Citations 
1946-147X
978-1-5386-8518-1
1
PageRank 
References 
Authors
0.34
12
3
Name
Order
Citations
PageRank
Salami Behzad1464.84
Osman Unsal216414.33
Adrián Cristal342440.74