Title | ||
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A 37-GHz-Input Divide-by-36 Injection-Locked Frequency Divider with 1.6-GHz Lock Range |
Abstract | ||
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This paper presents a divide-by-36 injection-locked frequency divider (ILFD). It locks onto a 37-GHz input over a locking range of about 1.6 GHz (4.3%) and outputs a frequency of approximately 1GHz, which is sufficiently low for further division by a programmable divider. The high division ratio is realized by time-gating the superharmonic input signal and injecting it into a 9-stage ring VCO at 9 feeding points. Nine gating signals are generated by the ring VCO itself by logic operation such that the input signal is injected only during the correct time slice for each of the feeding points. The ILFD was fabricated using a 55-nm deeply depleted channel (DDC) CMOS process, occupies an area of 0.020 mm
<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup>
, and consumes a power of 9.1 mW. |
Year | DOI | Venue |
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2018 | 10.1109/ASSCC.2018.8579347 | 2018 IEEE Asian Solid-State Circuits Conference (A-SSCC) |
Keywords | Field | DocType |
Injection-locked frequency divider (ILFD),lock range,ring VCO,CMOS | Phase-locked loop,Frequency divider,Lock (computer science),Computer science,Injection locked,Communication channel,Phase noise,Electronic engineering,Voltage-controlled oscillator,Harmonic analysis | Conference |
ISBN | Citations | PageRank |
978-1-5386-6414-8 | 0 | 0.34 |
References | Authors | |
7 | 6 |
Name | Order | Citations | PageRank |
---|---|---|---|
Sang-yeop Lee | 1 | 1 | 0.69 |
Kyoya Takano | 2 | 37 | 11.64 |
Ruibing Dong | 3 | 4 | 2.93 |
Shuhei Amakawa | 4 | 29 | 10.93 |
Takeshi Yoshida | 5 | 30 | 9.22 |
Minoru Fujishima | 6 | 96 | 30.68 |