Title
Understanding Mpsocs: Exploiting Memory Microarchitectural Vulnerabilities Of High Performance Noc-Based Mpsocs
Abstract
Multi-Processor Systems-on-Chips (MPSoCs) are the key enabler technology for current and future applications. However, the high on-chip connectivity, the programmability and IPs reusability, also introduce security concerns. Problems arise when applications with different trust and security levels share the MPSoC resources. One of the potent threats that MPSoCs see themselves exposed to are the so-called side-channel attacks (SCA). In this work, we explore the cache-based side-channel attacks optimized by the communication structure. We evaluate the vulnerability of the different NoC-based MPSoC memory configuration against micro-architectural side channel attacks. Our attack targets an MPSoC AES T-Table implementation. We explore the impact of the MPSoC organization on the NoC timing attack. We present the huge impact on the memory organization and present two attack metrics:efficacy and efficiency. Our results show that NoC-based MPSoCs are vulnerable and that deep memory hierarchies favor the security of the system.
Year
DOI
Venue
2018
10.1145/3229631.3239367
2018 INTERNATIONAL CONFERENCE ON EMBEDDED COMPUTER SYSTEMS: ARCHITECTURES, MODELING, AND SIMULATION (SAMOS XVIII)
Field
DocType
Citations 
Computer science,Cache,Field-programmable gate array,Timing attack,Side channel attack,Memory organisation,MPSoC,Reusability,Embedded system,Vulnerability
Conference
1
PageRank 
References 
Authors
0.36
9
5
Name
Order
Citations
PageRank
Johanna Sepúlveda18219.84
Cezar Reinbrecht2749.87
Siavoosh Payandeh Azad3116.94
Behrad Niazmand4225.76
Gert Jervan57313.53