Title
Efficient Memristor-Based Architecture for Intrusion Detection and High-Speed Packet Classification.
Abstract
Deep packet inspection (DPI) is a critical component to prevent intrusion detection. This requires a detailed analysis of each network packet header and body. Although this is often done on dedicated high-power servers in most networked systems, mobile systems could potentially be vulnerable to attack if utilized on an unprotected network. In this case, having DPI hardware on the mobile system would be highly beneficial. Unfortunately, DPI hardware is generally area and power consuming, making its implementation difficult in mobile systems. We developed a memristor crossbar-based approach, inspired by memristor crossbar neuromorphic circuits, for a low-power, low-area, and high-throughput DPI system that examines both the header and body of a packet. Two key types of circuits are presented: static pattern matching and regular expression circuits. This system is able to reduce execution time and power consumption due to its high-density grid and massive parallelism. Independent searches are performed using low-power memristor crossbar arrays giving rise to a throughput of 160Gbps with no loss in the classification accuracy.
Year
DOI
Venue
2018
10.1145/3264819
JETC
Keywords
Field
DocType
Deep packet inspection, Snort, hardware architectures, memristor crossbars, network security, packet classification, range matching, router, string matching
Deep packet inspection,Memristor,Computer science,Network packet,Network security,Real-time computing,Header,Throughput,Intrusion detection system,Crossbar switch,Embedded system
Journal
Volume
Issue
ISSN
14
4
1550-4832
Citations 
PageRank 
References 
0
0.34
28
Authors
4
Name
Order
Citations
PageRank
Venkata Ramesh Bontupalli110.73
Chris Yakopcic214013.10
Raqibul Hasan3768.74
Tarek M. Taha428032.89