Title
Cellular automata based fault tolerant resistive memory design
Abstract
This work reports a fault tolerant design for the high density resistive memories. It addresses the limitation of low cell reliability of resistive memories and the restricted write endurance. The faulty and worn-out cells of a memory module are identified on-line to recover from the damage caused during the life time of a chip. Von Neumann's theory of cellular automata has been used as a basis of the reported design. The single length cycle cellular automata (SACA) is synthesized to capture the erronous recording in a memory cell during a write and memorizes the stuck-at value stored there of. It enables effective retrieval of data during a read, that is desired for the high density resistive memories.
Year
DOI
Venue
2016
10.1109/ISED.2016.7977077
2016 Sixth International Symposium on Embedded Computing and System Design (ISED)
Keywords
Field
DocType
Resistive memory,cellular automata,fault tolerance,SACA
Cellular automaton,Computer science,Resistive touchscreen,Parallel computing,Chip,Fault tolerance,Computer hardware,Von Neumann architecture,Memory cell,Memory module,Resistive random-access memory
Conference
ISBN
Citations 
PageRank 
978-1-5090-2542-8
0
0.34
References 
Authors
0
3
Name
Order
Citations
PageRank
Mousumi Saha124.13
Sutapa Sarkar200.34
Biplab K. Sikdar321740.85