Name
Title | ||
|---|---|---|
Security, Performance and Energy Trade-Offs of Hardware-Assisted Memory Protection Mechanisms |
Abstract | ||
|---|---|---|
The deployment of large-scale distributed systems, e.g., publish-subscribe platforms, that operate over sensitive data using the infrastructure of public cloud providers, is nowadays heavily hindered by the surging lack of trust toward the cloud operators. Although purely software-based solutions exist to protect the confidentiality of data and the processing itself, such as homomorphic encryption schemes, their performance is far from being practical under real-world workloads. The performance trade-offs of two novel hardware-assisted memory protection mechanisms, namely AMD SEV and Intel SGX - currently available on the market to tackle this problem, are ADD described in this practical experience. Specifically, we implement and evaluate a publish/subscribe use-case and evaluate the impact of the memory protection mechanisms and the resulting performance. This paper reports on the experience gained while building this system, in particular when having to cope with the technical limitations imposed by SEV and SGX. Several tradeoffs that provide valuable insights in terms of latency, throughput, processing time and energy requirements are exhibited by means of micro-and macro-benchmarks. |
Year | DOI | Venue |
|---|---|---|
2019 | 10.1109/SRDS.2018.00024 | 2018 IEEE 37th Symposium on Reliable Distributed Systems (SRDS) |
Keywords | DocType | ISSN |
intel sgx,amd sev,memory,performance,security,energy,trade offs,benchmarks | Journal | 1060-9857 |
ISBN | Citations | PageRank |
978-1-5386-8302-6 | 3 | 0.41 |
References | Authors | |
29 | 7 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Christian Göttel | 1 | 4 | 1.13 |
| Rafael Pires | 2 | 48 | 5.64 |
| Isabelly Rocha | 3 | 5 | 1.60 |
| Sebastien Vaucher | 4 | 6 | 1.85 |
| Pascal A. Felber | 5 | 1086 | 69.47 |
| Marcelo Pasin | 6 | 181 | 17.37 |
| Valerio Schiavoni | 7 | 235 | 28.37 |