Title
BLPP: Improving the Performance of GPGPUs with Heterogeneous Memory through Bandwidth- and Latency-Aware Page Placement
Abstract
GPGPUs with heterogeneous memory have surfaced as a promising solution to improve the programmability and flexibility of GPGPU computing. Despite the extensive prior works, relatively little work has been done to investigate holistic system software support for heterogeneity-aware memory management. To bridge this gap, we propose bandwidth-and latency-aware page placement (BLPP) for GPGPUs with heterogeneous memory. BLPP dynamically places pages across the heterogeneous memory nodes by preserving the optimal allocation ratio computed based on their performance characteristics. Our experimental results show that BLPP considerably outperforms the state-of-the-art technique and performs similarly to the static-best version, which requires extensive offline profiling.
Year
DOI
Venue
2018
10.1109/ICCD.2018.00061
2018 IEEE 36th International Conference on Computer Design (ICCD)
Keywords
Field
DocType
Memory management,Heterogeneous memory,GPGPU computing,High performance
System software,Computer science,Profiling (computer programming),Latency (engineering),Gpgpu computing,Parallel computing,Page placement,Bandwidth (signal processing),Memory management
Conference
ISSN
ISBN
Citations 
1063-6404
978-1-5386-8478-8
0
PageRank 
References 
Authors
0.34
14
2
Name
Order
Citations
PageRank
kyu yeun kim1102.22
Woongki Baek240225.85