Name
Title | ||
|---|---|---|
Accurate Performance Bounds Calculation for Dynamic Voltage-Freq Islands in Best Effort NoCs |
Abstract | ||
|---|---|---|
Dynamic voltage and frequency scaling (DVFS) is a technique used to meet the power budget limitations in multi-core embedded systems. DVFS is applied to Networks-on-Chip (NoC) as a major contributor of the dissipated power on-chip. We propose an analytic model to accurately calculate the performance bounds on the best effort NoC with multiple voltage-frequency islands. The model supports dual-port buffer or handshaking mechanisms. We also suggest a method to set the frequencies of the islands to decrease the dissipated power. We examine our method and models and show their effectiveness. |
Year | DOI | Venue |
|---|---|---|
2018 | 10.1109/ICCD.2018.00082 | 2018 IEEE 36th International Conference on Computer Design (ICCD) |
Keywords | Field | DocType |
Networks-on-Chip, NoC, DVFS, Performance Bound, Power, Voltage and frequency scaling, Handshaking, Real time, Quality-of-Service, QoS, Worst-case, Delay, Bandwidth | Power budget,Computer science,Voltage,Parallel computing,Quality of service,Electronic engineering,Bandwidth (signal processing),Handshaking,Frequency scaling,Dissipated power,Analytic model | Conference |
ISSN | ISBN | Citations |
1063-6404 | 978-1-5386-8478-8 | 0 |
PageRank | References | Authors |
0.34 | 7 | 4 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Dara Rahmati | 1 | 58 | 6.65 |
| Sobhan Masoudi | 2 | 0 | 0.34 |
| Ahmad Khonsari | 3 | 210 | 42.43 |
| Reza Sabbaghi-Nadooshan | 4 | 41 | 8.21 |