Name
Abstract | ||
|---|---|---|
Effective interface protection techniques have been successfully developed to insert a sharp and thermally stable interlayer between the LPCVD (low pressure chemical vapor deposition)-SiN x gate dielectric and recess-etched GaN channel. The interlayer plays the critical role of protecting the etched GaN surface from degradation during high-temperature (i.e. at $sim780 circ C$) process, which is essential for fabricating enhancement-mode $LPCVD-SiN_{x}/GaN$ MIS-FETs with high stability and high reliability. With interface protection layer and reliable $LPCVD-SiN_{x}$ gate dielectric, the normally-off fully-recessed MIS-FET delivers remarkable advantages in high threshold voltage $(V_{th})$ thermal stability, long time-dependent gate dielectric breakdown (TDDB) lifetime and low bias temperature instability (BTI). |
Year | DOI | Venue |
|---|---|---|
2018 | 10.1109/ICDSP.2018.8631634 | DSL |
Field | DocType | Citations |
Gallium nitride,Computer vision,Logic gate,Dielectric,Computer science,Gate dielectric,Time-dependent gate oxide breakdown,Thermal stability,Artificial intelligence,Threshold voltage,Optoelectronics,Chemical vapor deposition | Conference | 0 |
PageRank | References | Authors |
0.34 | 0 | 2 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Mengyuan Hua | 1 | 0 | 1.01 |
| Kevin J. Chen | 2 | 11 | 7.09 |