Name
Abstract | ||
|---|---|---|
In this paper, we developed a simulation-based architecture evaluation framework for field-programmable gate arrays (FPGAs), called FPGA-SPICE, which enables automatic layout-level estimation and electrical simulations of FPGA architectures. FPGA-SPICE can automatically generate Verilog and SPICE netlists based on realistic FPGA configurations and a high-level eTtensible Markup Language-based FPGA architectural description language. The outputted Verilog netlists can be used to generate layouts of full FPGA fabrics through a semicustom design flow. SPICE simulation decks can be generated at three levels of complexity, namely, full-chip-level, grid-level, and component-level, providing different tradeoff between accuracy and simulation time. In order to enable such level of analysis, we presented two SPICE netlist partitioning techniques: loads extraction and parasitic net activity estimation. Electrical simulations showed that averaged over the selected benchmarks, the grid-/component-level approach can achieve
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execution speed-up with 9.9%/8.3% accuracy loss, respectively, compared to the full-chip level simulation. FPGA-SPICE was showcased through three different case studies: 1) an area breakdown analysis for static random access memory-based FPGAs, showing that configuration memories are a dominant factor; 2) a power breakdown comparison to analytical models, analyzing the source of accuracy loss; and 3) a robustness evaluation against process corners, studying their impact on energy consumption of full FPGA fabrics. |
Year | DOI | Venue |
|---|---|---|
2019 | 10.1109/TVLSI.2018.2883923 | IEEE Transactions on Very Large Scale Integration (VLSI) Systems |
Keywords | Field | DocType |
Field programmable gate arrays,Computer architecture,SPICE,Fabrics,Integrated circuit modeling,Routing,Tools | Netlist,Computer science,Process corners,Spice,Field-programmable gate array,Electronic engineering,Robustness (computer science),Design flow,Electronic design automation,Verilog,Computer engineering | Journal |
Volume | Issue | ISSN |
27 | 3 | 1063-8210 |
Citations | PageRank | References |
2 | 0.39 | 0 |
Authors | ||
4 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Xifan Tang | 1 | 59 | 12.89 |
| Edouard Giacomin | 2 | 20 | 4.09 |
| Giovanni De Micheli | 3 | 10245 | 1018.13 |
| Pierre-Emmanuel Gaillardon | 4 | 355 | 55.32 |