Paper Info
Title
Full System Emulation of Embedded Heterogeneous Multicores Based on QEMU
Abstract
The emerging edge computing is poised to move computing and intelligence to the network's edge so as to be close to the data sources for fast responses and reduced network traffic. In edge computing, edge devices need to encompass a wide variety of applications or services, from data preprocessing, intelligence inference, to multimedia human interface. Many such applications are well suited for special-purpose hardware accelerators. With the increasing number of accelerators on the edge devices, a promising architecture for edge devices is an asymmetric heterogeneous multicore that incorporates one or more microcontrollers to offload accelerator scheduling and interrupt handling from the main CPU, as exemplified in the NVIDIA Deep Learning Accelerator (NVDLA). To develop such computing systems, virtual platforms such as QEMU are often used. Unfortunately, QEMU only supports symmetric homogeneous multicore systems. In this paper, we tackle the challenging problem of supporting asymmetric heterogeneous multicore systems on QEMU by considering two possible implementation strategies: one-process and multi-process. The challenges are discussed and our implementations are presented. The two approaches are then compared qualitatively and quantitatively.
Year
DOI
Venue
2018
10.1109/PADSW.2018.8645045
2018 IEEE 24th International Conference on Parallel and Distributed Systems (ICPADS)
Keywords
Field
DocType
Microcontrollers,Libraries,Multicore processing,Emulation,Instruction sets,Graphics processing units
Interrupt,Edge computing,Computer science,Scheduling (computing),Instruction set,Emulation,Edge device,Multi-core processor,Distributed computing,Embedded system,Human interface device
Conference
ISSN
ISBN
Citations 
1521-9097
978-1-5386-7308-9
0
PageRank 
References 
Authors
0.34
0
4
Name
Order
Citations
PageRank
I-Hua Chen100.34
King CT282.23
Yao-Hua Chen341.43
Juin-Ming Lu441.49