Name
Title | ||
|---|---|---|
Design and Optimization of Reconfigurable Data Path for Communication Baseband Signal Processing |
Abstract | ||
|---|---|---|
A Coarse-Grained Reconfigurable Architecture called RASP2.0 is proposed in this paper for communication baseband signal processing. Based on the pipeline bubbles theory, the reconfigurable data path is divided into the data flow between processing elements and the data interaction between reconfigurable arrays and memory structure. To reduce the data transmission delay, the data flow features are summarized based on the locality and lifetime of data. By employing a parallel memory structure combined with the DLT-based data updating strategy, the access performance is improved by 33% on average compared with RASP1.0. As a result, the reconfigurable system presents more performance advantages and flexibility than other similar platforms. |
Year | DOI | Venue |
|---|---|---|
2018 | 10.1109/CyberC.2018.00090 | 2018 International Conference on Cyber-Enabled Distributed Computing and Knowledge Discovery (CyberC) |
Keywords | Field | DocType |
Random access memory,System-on-chip,Baseband,Kernel,Registers,Data communication,Hardware | Kernel (linear algebra),Locality,Architecture,Baseband,System on a chip,Data transmission,Data path,Computer science,Real-time computing,Computer hardware,Data flow diagram | Conference |
ISSN | ISBN | Citations |
2475-7020 | 978-1-7281-0974-9 | 0 |
PageRank | References | Authors |
0.34 | 0 | 4 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Shan-shan Zhu | 1 | 11 | 3.30 |
| Hai Qin | 2 | 0 | 1.01 |
| Bo Liu | 3 | 6 | 5.82 |
| Jun Yang | 4 | 82 | 40.03 |