Name
Abstract | ||
|---|---|---|
In spite of much advancement in network-on-chip (NoC), area overhead further need to be explored and improved. Thus, a high performance router using minimum hardware circuits will not only reduce cost but also minimize the layout area. In this paper, we have proposed a memory sharing method, where a memory is shared by several physical links by using a multi-port memory. To show the superiority of the proposed link sharing method over the traditional method, we have evaluated the communication performance of a 3D torus network and compare it with different block size. It is shown that the communication performance by link-sharing method outperformed the traditional method. |
Year | DOI | Venue |
|---|---|---|
2016 | 10.1109/ICCE-TW.2016.7521020 | 2016 IEEE INTERNATIONAL CONFERENCE ON CONSUMER ELECTRONICS-TAIWAN (ICCE-TW) |
Keywords | DocType | Citations |
Router, Interconnection Network, Network-on-Chip (NoC), Multi-Port Memory | Conference | 0 |
PageRank | References | Authors |
0.34 | 0 | 4 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Naohisa Fukase | 1 | 2 | 2.24 |
| Yasuyuki Miura | 2 | 0 | 2.37 |
| Shigeyoshi Watanabe | 3 | 1 | 1.09 |
| M. M. Hafizur Rahman | 4 | 53 | 10.31 |