Title
CMOS technology scaling advantages in time domain signal processing
Abstract
This paper compares two CMOS technologies, the robust 350nm version and its modern 28nm successor, in terms of time-domain signal processing parameters. The evaluated parameters; propagation delay, delay variation due to process and mismatch fluctuations, sensitivity to noise and area and power usage are crucial especially in measurement devices relying on precise timings, high precision time-to-digital converters, for example. Post-layout simulations show that the modern scaled technology offers superior speed, efficient area usage and low power consumption but suffers from considerable delay mismatch. Therefore applications relying on precise time domain signal processing do not always benefit from technology scaling.
Year
DOI
Venue
2017
10.1109/I2MTC.2017.7969659
2017 IEEE International Instrumentation and Measurement Technology Conference (I2MTC)
Keywords
Field
DocType
Technology scaling,time-domain,CMOS,delay element,ring oscillator,time-to-digital converter,TDC
Signal processing,Time domain signal processing,Cmos technology scaling,Capacitance,Propagation delay,Electronic engineering,Converters,CMOS,Transistor,Electrical engineering,Mathematics
Conference
ISBN
Citations 
PageRank 
978-1-5090-3597-7
0
0.34
References 
Authors
5
4
Name
Order
Citations
PageRank
Jussi-pekka Jansson1356.32
Pekka Keränen2173.30
Juha Kostamovaara3333117.75
A. Baschirotto417654.55