Paper Info
Title
Time-domain ramped gate sensing for embedded multi-level flash in automotive applications
Abstract
The advancing trend to autonomous driving tightens the requirements for automotive microcontrollers with embedded flash memories. High reliability and low latency demands however have prevented the broad usage of multilevel-cell flash in this sector so far. This paper describes a robust time-domain voltage sensing scheme tackling the challenges arising from these tight conditions. A dynamic voltage ramp is applied at the wordlines to operate the memory cells at optimum readout conditions. Thus a linearized transfer characteristic is achieved, which eases the cell state placement and reduces the effect of threshold shifts. A sense amplifier design with improved slope detection implemented in a 28 nm CMOS technology is presented. Simulations at nominal supply voltage 1.1 V V-DD show a 30% increased maximum read window compared to the former design.
Year
DOI
Venue
2017
10.1109/MWSCAS.2017.8053017
Midwest Symposium on Circuits and Systems Conference Proceedings
Keywords
Field
DocType
embedded flash,multi-level flash,sense amplifier,voltage sensing,time-domain sensing
Time domain,Sense amplifier,Logic gate,Computer science,Voltage,Electronic engineering,Robustness (computer science),CMOS,Microcontroller,Latency (engineering),Electrical engineering
Conference
ISSN
Citations 
PageRank 
1548-3746
0
0.34
References 
Authors
4
3
Name
Order
Citations
PageRank
Sebastian Kiesel100.68
Thomas Kern200.68
Bernhard Wicht3199.30