Name
Title | ||
|---|---|---|
Finding and Applying Loop Transformations for Generating Optimized FPGA Implementations |
Abstract | ||
|---|---|---|
When implementing multimedia applications, solutions in dedicated hardware are chosen only when the required performance or energy-efficiency cannot be met with a software solution. The performance of a hardware design critically depends upon having high levels of parallelism and data locality. Often a long sequence of high-level transformations is needed to sufficiently increase the locality and parallelism. The effect of the transformations is known only after translating the high-level code into a specific design at the circuit level. When the constraints are not met, hardware designers need to redo the high-level loop transformations, and repeat all subsequent translation steps, which leads to long design times.We propose a method to reduce design time through the synergistic combination of techniques (a) to quickly pinpoint the loop transformations that increase locality; (b) to refactor loops in a polyhedral model and check whether a sequence of refactorings is legal; (c) to generate efficient structural VHDL from the optimized refactored algorithm.The implementation of these techniques in a tool suite results in a far shorter design time of hours instead of days or weeks. A 2D-inverse discrete wavelet transform was taken as a case study. The results outperform those of a commercial C-to-VHDL compiler, and compare favorably with existing published approaches. |
Year | DOI | Venue |
|---|---|---|
2007 | 10.1007/978-3-540-71528-3_11 | T. HiPEAC |
Keywords | Field | DocType |
data locality,shorter design time,generating optimized fpga implementations,hardware designer,dedicated hardware,hardware design,design time,high-level loop transformation,high-level code,loop transformations,specific design,long design time,polyhedral model,energy efficient,discrete wavelet transform | Loop nest optimization,Locality,Computer science,Parallel computing,Real-time computing,Compiler,Software,Discrete wavelet transform,VHDL,Polytope model,Code refactoring,Distributed computing | Journal |
Volume | ISSN | Citations |
1 | 0302-9743 | 13 |
PageRank | References | Authors |
0.97 | 23 | 6 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Harald Devos | 1 | 34 | 7.10 |
| Kristof Beyls | 2 | 295 | 17.48 |
| Mark Christiaens | 3 | 149 | 12.79 |
| Jan Campenhout | 4 | 13 | 0.97 |
| Erik H. D'Hollander | 5 | 281 | 28.21 |
| dirk stroobandt | 6 | 833 | 101.36 |