Title
Simulation analysis of semiconductor manufacturing with small lot size and batch tool replacements
Abstract
Long cycle times in semiconductor manufacuring represent an increasing challenge for the industry and lead to a growing need of break-through approaches to reduce it. Small lot sizes and the conversion of batch processes to mini-batch or single-wafer processes are widely regarded as a promising means for a step-wise cycle time reduction. However, there is still a lack of comprehensive and meaningful studies. In this paper we present first results of our modeling and simulation assessment. Our simulation analysis shows that small lot size and the replacement of batch tools with mini-batch or single wafer tools are beneficial but lot size reduction lacks persuasive effectiveness if reduced by more than half.
Year
DOI
Venue
2008
10.1109/WSC.2008.4736309
European Journal of Industrial Engineering
Keywords
Field
DocType
cycle times,semiconductor manufacturing
Wafer,Computer science,Modeling and simulation,Semiconductor device fabrication,Mean squared error,Manufacturing engineering,Size reduction
Conference
Volume
Issue
ISBN
5
3
978-1-4244-2708-6
Citations 
PageRank 
References 
2
0.47
2
Authors
2
Name
Order
Citations
PageRank
Kilian Schmidt182.25
Oliver Rose21710.43