Name
Abstract | ||
|---|---|---|
The Xyce Parallel Circuit Simulator, which has demonstrated scalable circuit simulation on hundreds of processors, heavily leverages the high-performance scientific libraries provided by Trilinos. With the move towards multi-core CPUs and GPU technology, retaining this scalability on future parallel architectures will be a challenge. This paper will discuss how Trilinos is an enabling technology that will optimize the trade-off between effort and impact for application codes, like Xyce, in their transition to becoming next-generation simulation tools. |
Year | DOI | Venue |
|---|---|---|
2011 | 10.1007/978-3-642-29737-3_36 | Euro-Par Workshops |
Keywords | Field | DocType |
high-performance scientific library,enabling technology,parallel circuit simulator,application code,future parallel architecture,next-generation simulation tool,scalable circuit simulation,next-generation parallel circuit simulation,multi-core cpus,gpu technology | Load balancing (computing),Computer science,Parallel computing,Series and parallel circuits,Scalability | Conference |
Volume | ISSN | Citations |
7155 | 0302-9743 | 1 |
PageRank | References | Authors |
0.36 | 8 | 7 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Chris Baker | 1 | 1 | 0.36 |
| Erik Boman | 2 | 8 | 2.92 |
| Mike Heroux | 3 | 5 | 2.23 |
| Eric Keiter | 4 | 1 | 0.36 |
| Siva Rajamanickam | 5 | 1 | 0.36 |
| Rich Schiek | 6 | 1 | 0.36 |
| Heidi Thornquist | 7 | 6 | 1.64 |