Name
Abstract | ||
|---|---|---|
Demands on computing performance are steadily increasing, also in the domain of embedded hard real-time applications. Accordingly, multicore processors have already entered the hard real-time domain, mainly for execution of multiple applications. Further performance improvements can be gained by executing multithreaded applications on multicores. Since such applications share data between multiple cores, coherent accesses to that data must be guaranteed. To be applied in hard real-time domains, the complete system, including the cache hierarchy, needs to provide a predictable timing behaviour that allows a static estimate of the worst case execution time.This paper presents an analysis of the well-known MESI (Modified, Exclusive, Shared, Invalid) technique and its drawbacks concerning time predictability. Moreover, we show ways how to implement a MESI technique suitable for hard real-time systems. |
Year | DOI | Venue |
|---|---|---|
2015 | 10.1007/978-3-319-16086-3_17 | ARCHITECTURE OF COMPUTING SYSTEMS - ARCS 2015 |
Keywords | Field | DocType |
Hard real-time systems, Timing predictability, Cache coherence, Multicore | Worst-case execution time,Computer science,MESIF protocol,Snoopy cache,MESI protocol,Parallel computing,Smart Cache,Multi-core processor,Multicore systems,Cache coherence | Conference |
Volume | ISSN | Citations |
9017 | 0302-9743 | 0 |
PageRank | References | Authors |
0.34 | 12 | 3 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Sascha Uhrig | 1 | 313 | 24.54 |
| Lillian Tadros | 2 | 0 | 0.68 |
| Arthur Pyka | 3 | 9 | 1.62 |