Abstract | ||
---|---|---|
By sidestepping the limitations at the memory interface, processing-in-memory (PIM) unlocks internally available memory bandwidth to the compute units on the memory side. This abundant bandwidth is conventionally utilized by highly-parallel throughput-oriented many-core style PIM architectures via offloading bandwidth-bound parallel tasks. However, it can be difficult to fully isolate these PIM-su... |
Year | DOI | Venue |
---|---|---|
2019 | 10.1109/LCA.2019.2894800 | IEEE Computer Architecture Letters |
Keywords | Field | DocType |
Bandwidth,Task analysis,Silicon,Analytical models,Computational modeling,Multicore processing | Bottleneck,Computer architecture,Memory interface,Architecture,Memory bandwidth,Task analysis,Computer science,Parallel computing,Bandwidth (signal processing),Multi-core processor | Journal |
Volume | Issue | ISSN |
18 | 1 | 1556-6056 |
Citations | PageRank | References |
0 | 0.34 | 0 |
Authors | ||
2 |
Name | Order | Citations | PageRank |
---|---|---|---|
Berkin Akin | 1 | 83 | 5.59 |
Alaa R. Alameldeen | 2 | 1672 | 80.06 |