Name
Abstract | ||
|---|---|---|
The paper is focused on rapid prototyping for FPGA using the high-level environment of MATLAB/Simulink. An approach using combination of the Xilinx System Generator (XSG) and Handel-C is reviewed. A design flow to minimize HDL coding is considered. |
Year | DOI | Venue |
|---|---|---|
2003 | 10.1007/978-3-540-45234-8_101 | Lecture Notes in Computer Science |
Keywords | Field | DocType |
design flow | Rapid prototyping,MATLAB,Computer science,Matlab simulink,Field-programmable gate array,Circuit design,FPGA prototype,Coding (social sciences),Design flow,Embedded system | Conference |
Volume | ISSN | Citations |
2778 | 0302-9743 | 2 |
PageRank | References | Authors |
0.65 | 1 | 4 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Miroslav Lícko | 1 | 6 | 1.16 |
| Jan Schier | 2 | 2 | 0.65 |
| Milan Tichý | 3 | 38 | 4.37 |
| Markus Kühl | 4 | 12 | 4.01 |