Title | ||
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An area-efficient digitally-assisted DC canceling loop for high sensitivity UHF RFID receiver |
Abstract | ||
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An area-efficient digitally-assisted DC canceling loop is presented for high sensitivity single-chip UHF RFID readers. The proposed loop suppresses the DC blocker in RFID receivers by 41 dB with the aid of negative feedback. A delta-sigma modulator with 67dB dynamic range is implemented in the loop to enhance the sensitivity of the receiver. A reconfigurable digital loop filter with low cut off frequency is designed for compact chip area. The DC canceling loop is fabricated in a 0.13µm CMOS process. It occupies a silicon area of 1.69mm
<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup>
and dissipates 24.3mW from a 1.2V supply. The proposed loop is demonstrated in an RFID reader prototype. A −70dBm sensitivity of the reader is measured in the presence of +5dBm self-jammer. |
Year | DOI | Venue |
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2016 | 10.1109/RFID-TA.2016.7750759 | 2016 IEEE International Conference on RFID Technology and Applications (RFID-TA) |
Keywords | Field | DocType |
RFID reader,receiver,high sensitivity,feedback,DC canceling loop | Digital signal processing,Dynamic range,Negative feedback,Electronic engineering,Modulation,Chip,Transfer function,Engineering,Cutoff frequency,Ultra high frequency,Embedded system | Conference |
ISBN | Citations | PageRank |
978-1-5090-1409-5 | 0 | 0.34 |
References | Authors | |
4 | 5 |