Name
Abstract | ||
|---|---|---|
In this paper, a scalable hardware architecture for string sorting in the application field of Big Data is presented. Current hardware architectures focus on the acceleration of sorting small sets of data with a maximum string length. In contrast, we propose an FPGA-accelerated architecture based on Radix-Trees, which has the ability to sort large sets of strings without practical limitation of the string length. The Radix-Tree is parameterizable and so is the design, which enables the adaptation for application-specific properties, such as diversity of strings and size of the used alphabet. The scalable design has a hierarchical processing and memory architecture, which operate in parallel. Optimal parameters and configurations are evaluated by using a dataset of the Semantic Web, as an example of Big Data applications. The results are analyzed with a focus on throughput, memory requirement, and utilization. The hardware design is faster for all values of the radix parameter and achieves a maximum speed-up factor of 2.78 compared to a software system. |
Year | Venue | Field |
|---|---|---|
2017 | ARCS | Computer science,sort,Parallel computing,Field-programmable gate array,Software system,Sorting,Radix tree,Computer hardware,Memory architecture,Scalability,Hardware architecture |
DocType | Citations | PageRank |
Conference | 0 | 0.34 |
References | Authors | |
4 | 7 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Christopher Blochwitz | 1 | 0 | 0.34 |
| Julian Wolff | 2 | 0 | 0.68 |
| Jan Moritz Joseph | 3 | 20 | 9.01 |
| Stefan Werner | 4 | 3 | 1.45 |
| dennis heinrich | 5 | 10 | 3.46 |
| Sven Groppe | 6 | 271 | 37.62 |
| Thilo Pionteck | 7 | 90 | 26.99 |