Paper Info
Title
Exploring one-sided communication and synchronization on a non-cache-coherent many-core architecture.
Abstract
The ongoing many-core design aims at core counts where cache coherence becomes a serious challenge. Therefore, this paper discusses how one-sided communication and the required process synchronization can be realized on a non-cache-coherent many-core CPU. The Intel Single-chip Cloud Computer serves as an exemplary hardware architecture. The presented approach is based on software-managed cache coherence for MPI one-sided communication. The prototype implementation delivers a PUT performance of up to 5 times faster than the default message-based approach and reveals a reduction of the communication costs for the NAS Parallel Benchmarks 3-D fast Fourier Transform by a factor of 5. Further, the paper derives conclusions for future non-cache-coherent architectures.
Year
DOI
Venue
2017
10.1002/cpe.4113
CONCURRENCY AND COMPUTATION-PRACTICE & EXPERIENCE
Keywords
Field
DocType
MPI,one-sided communication,programming models and systems for many-cores,synchronization,software-managed cache coherence
Synchronization,Computer science,Cache,Data synchronization,Parallel computing,Fast Fourier transform,Synchronization (computer science),Distributed computing,Hardware architecture,Cache coherence,Cloud computing
Journal
Volume
Issue
ISSN
29
SP15
1532-0626
Citations 
PageRank 
References 
0
0.34
16
Authors
2
Name
Order
Citations
PageRank
Steffen Christgau1154.13
Bettina Schnor214226.36