Title
Routing approach for digital, differential bipolar designs using virtual fat-wire boundary pins
Abstract
This paper presents an alternative fat-wire routing approach for differential bipolar high-speed designs. The proposed solution obtains parallel routing and well balanced capacitive load of the fully differential signaling. In contrast to other approaches, the proposed flow is optimized for complex bipolar CML/ECL standard cell designs and technology options with few available routing layers. It enables the use of advanced placement and routing methods, such as multi-oriented cell placement and in-place optimization, supported by the standard CAD tools. The standard cell requirements and the corresponding modified digital design flow are proposed and discussed. The presented strategy is evaluated on a 12.5 GHz PLL feedback clock divider which has been fully implemented with differential ECL standard cell gates. A discussion regarding the obtained results finalizes this paper.
Year
DOI
Venue
2017
10.1109/DDECS.2017.7934555
2017 IEEE 20th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS)
Keywords
Field
DocType
Fat-wire Routing,Differential Signaling,ECL,CML,Current Mode Logic,Digital Design,Design Flow
Differential signaling,Phase-locked loop,Logic gate,Frequency divider,Computer science,Power factor,Electronic engineering,Real-time computing,Design flow,Routing (electronic design automation),Standard cell
Conference
ISSN
ISBN
Citations 
2334-3133
978-1-5386-0473-1
0
PageRank 
References 
Authors
0.34
2
4
Name
Order
Citations
PageRank
Oliver Schrape1199.55
Manuel Herrmann200.34
Frank Winkler3369.50
Milos Krstic417039.42