Name
Title | ||
|---|---|---|
TC-Release++: An Efficient Timestamp-Based Coherence Protocol for Many-Core Architectures. |
Abstract | ||
|---|---|---|
As we enter the era of many-core, providing the shared memory abstraction through cache coherence has become progressively difficult. The standard directory-based coherence does not scale well with increasing core count. Timestamp-based hardware coherence protocols introduced recently offer an attractive alternative solution. This paper proposes a timestamp-based coherence protocol, called TC-Rele... |
Year | DOI | Venue |
|---|---|---|
2017 | 10.1109/TPDS.2017.2719679 | IEEE Transactions on Parallel and Distributed Systems |
Keywords | Field | DocType |
Coherence,Protocols,Graphics processing units,Hardware,Memory management,Programming,Electronic mail | Shared memory,Computer science,Cache,MESIF protocol,Parallel computing,MESI protocol,Real-time computing,Memory coherence,Timestamp,Bus sniffing,Distributed computing,Cache coherence | Journal |
Volume | Issue | ISSN |
28 | 11 | 1045-9219 |
Citations | PageRank | References |
1 | 0.36 | 25 |
Authors | ||
4 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Yuan Yao | 1 | 105 | 12.54 |
| Wenzhi Chen | 2 | 141 | 28.65 |
| Tulika Mitra | 3 | 2714 | 135.99 |
| Yang Xiang | 4 | 2930 | 212.67 |