Title | ||
---|---|---|
A Novel MTJ-Based Non-Volatile Ternary Content-Addressable Memory for High-Speed, Low-Power, and High-Reliable Search Operation |
Abstract | ||
---|---|---|
Recently, several magnetic tunnel junction (MTJ)-based non-volatile ternary content-addressable memory (NV-TCAM) cells have been proposed to realize zero standby power. However, they still suffer from low reliability and high power consumption during search operations. To address these issues, we propose a novel MTJ-based NV-TCAM cell, which is composed of 15 transistors and 4 MTJs (15T-4MTJ). By utilizing the differential MTJs with complementary states and positive feedback of cross-coupled inverters for sensing, the proposed 15T-4MTJ NV-TCAM cell can significantly improve the search reliability. Moreover, owing to that there is no static current during search operations, only dynamic charging and discharging current, it can achieve ultra-low power consumption. In addition, by using only one transistor as the critical path between the match-line and GND, its switch delay can be shortened, thereby realizing high-speed search operations. Hybrid CMOS/MTJ simulation results of the 144-bit word circuit show that the proposed 15T-4MTJ NV-TCAM cell can obtain a smaller search error rate of 2.7%, a higher search speed of 0.17 ns, and a lower search energy of 0.17 fJ/bit/search in comparison with other MTJ-based NV-TCAM cells. On the other hand, its write energy of 1.589 pJ/bit is about
<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$3.64\times $ </tex-math></inline-formula>
smaller than that of the previously proposed 10T-4MTJ NV-TCAM cell. |
Year | DOI | Venue |
---|---|---|
2019 | 10.1109/TCSI.2018.2885343 | IEEE Transactions on Circuits and Systems I: Regular Papers |
Keywords | Field | DocType |
Magnetic tunneling,Transistors,Inverters,Integrated circuit reliability,Sensors,Delays | Standby power,Word error rate,Positive feedback,Electronic engineering,Ternary operation,CMOS,Critical path method,Tunnel magnetoresistance,Transistor,Mathematics | Journal |
Volume | Issue | ISSN |
66 | 4 | 1549-8328 |
Citations | PageRank | References |
2 | 0.41 | 0 |
Authors | ||
6 |
Name | Order | Citations | PageRank |
---|---|---|---|
Chengzhi Wang | 1 | 4 | 2.46 |
De-ming Zhang | 2 | 19 | 4.81 |
Lang Zeng | 3 | 18 | 4.67 |
Erya Deng | 4 | 57 | 7.33 |
J. Chen | 5 | 93 | 7.84 |
Weisheng Zhao | 6 | 730 | 105.43 |